Digital Systems Design
- Laboratory description -
Ist year, CE
1. | Logic multiplexers | requirements | |
2. | Logic decoders | requirements | |
3. | CLC synthesis using MUXes and DECs | requirements | |
4. | Binary adders | requirements | |
5. | Registers | requirements | |
6. | Counters and frequency dividers | requirements | |
7. | Classical synthesis of SLNs | requirements | |
8. | ASM diagrams utilisation | requirements | |
9. | VHDL | ||
10. | VHDL | ||
11. | VHDL | ||
12. | VHDL | ||
13. | Laboratory redoing | ||
14. | Laboratory test |
- Exam -
The students must pass a written examination.
In order to be allowed to enter the written examination, the minimum lab grade must be 5. In order to achieve a minimum grade of 5 for the labs, the presence is mandatory. There will be 12 laboratories, the 13th week is dedicated to redoing missed laboratories (a maximum of two) and the last to the laboratory test.
In order to be allowed to enter the written examination, the minimum lab grade must be 5. In order to achieve a minimum grade of 5 for the labs, the presence is mandatory. There will be 12 laboratories, the 13th week is dedicated to redoing missed laboratories (a maximum of two) and the last to the laboratory test.
- Laboratory situation -
-
1) 10105 B - 10106 B - laboratory situation - renewed 23.05.2012
-
Discipline titular - Ş.l. Dr. Eng. Eugen Dumitraşcu
Asist. Drd. Ing. Dan Ovidiu Andrei
Asist. Drd. Ing. Adrian Neaţu